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          Silicon Software

          microEnable 5 marathon緋誨垪CL鍥懼儚閲囬泦鍗?/h1> 浜у搧姒傝堪錛?br> 寰峰浗SiliconSoftware GmbH鎺ㄥ嚭鐨刴icroEnable 5 marathon VCL鏅鴻兘閲囬泦鍗″畾浣嶄簬Camera Link鏍囧噯鎽勫儚鏈虹殑楂橀€熷浘鍍忓鐞嗭紝騫舵彁渚汥MA1800鎶€鏈紝鑳藉婊¤凍楂樼駭鏈哄櫒瑙嗚搴旂敤鐨勯渶姹傘€俶icroEnable 5 marathon緋誨垪閲囬泦鍗″唴緗柊涓€浠f澘杞藉鐞嗗櫒Xilinx Kintex FPGA錛屽浘鍍忛噰闆嗗拰棰勫鐞嗛兘鍦‵PGA涓疄鏃跺畬鎴愩€傝緋誨垪浜у搧閲囩敤Camera Link鎺ュ彛錛屽彲婊¤凍Base銆丏ual Base銆丮edium銆丗ull銆丗ull 80bit銆?a href="/Index/fileDownload/cid/229/id/177.shtml">涓嬭澆浜у搧鎵嬪唽

          鈼? 鏀寔Camera Link鏍囧噯鏍煎紡鐨勬憚鍍忔満

          鈼?    鏉胯澆鍐呭瓨錛?GB DDR3-RAM

          鈼?    鏀寔闀跨數緙?/span>

          鈼?    鏉胯澆棰勫鐞嗗姛鑳?/span>

          鈼?    鏀寔宸ヤ笟綰у璁懼銆佸鎽勫儚鏈?/span>

          鈼?    鍩轟簬DMA1800鏁版嵁浼犺緭鎶€鏈紝PCIe鎬葷嚎浼犺緭鎬誨甫瀹藉彲杈?800 MBytes/s (PCIe 脳4 Gen2)

          鈼?    鍓嶇I/O鏀寔鍏夎€﹂殧紱諱俊鍙?/span>

          鈼?    騫挎硾鏀寔絎笁鏂硅蔣浠舵帴鍙?/span>

          鈼?    澶氱駭鍥懼儚澶勭悊鍔熻兘錛屾洿璐磋繎鍚勭鐗瑰畾搴旂敤闇€姹?/span>

          鈼?    閲囩敤Xilinx Kintex FPGA錛屽彲閫氳繃VisualApplets瀵笷PGA榪涜瀹氬埗寮€鍙?/span>

          鈼?    PoCL SafePower

          鈼?    鍙€夐厤鏈夋墿灞曞姛鑳界殑闄勫睘鍗′駭鍝?/span>

          鈼?    鍙敮鎸佹渶澶у垎杈ㄧ巼錛?4k脳64k (闈㈤樀)錛?4k (綰塊樀)

          鈼?    鏀寔32/64浣峎indows/Linux鎿嶄綔緋葷粺

          鈼?    宸ヤ綔娓╁害錛?-50擄C

          鍨嬪彿

          microEnable 5 marathon VCL

          microEnable 5 marathon ACL

          綾誨瀷

          V-Series (image processing board)

          A-Series (image acquisition board)

          閰嶇疆妯″紡

          CL-base銆?span>dual base銆?span>medium銆?span>full銆?span>deca (80bit)

          鍗忚鏍囧噯

          Camera Link 2.0, up to 85 MHz Pixel Clock, extended cable length

          鎬葷嚎鎺ュ彛

          PCI Express x4 (Gen 2), DMA1800

          鏉胯澆鍐呭瓨

          2 GByte DDR3-RAM

          512 MByte DDR3-RAM

          澶勭悊鍣?span>

          Vision Processor

          System Processor

          鍥懼儚鍔熻兘

          Advanced AcquisitionApplets (Pre-Processing)
          SmartApplets (Application Processing)
          VisualApplets (Application Programming)
          騫挎硾鏀寔絎笁鏂瑰浘鍍忓鐞嗚蔣浠?/span>

          騫挎硾鏀寔絎笁鏂瑰浘鍍忓鐞嗚蔣浠?/span>

          榪炴帴鍣?span>

          2 SDR26 (miniCL)

          2 SDR26 (miniCL)

          FPGA緙栫▼

          鏀寔

          涓嶆敮鎸?/span>

          鏀寔緋葷粺

          Windows XP, Vista, 7/8/10(32/64bit)錛?span>Linux 32-bit, Linux 64-bit


          鏉胯澆FPGA鍙繘琛屽浘鍍忛澶勭悊錛屼嬌鐢ㄥ湪澶ф暟鎹祦銆侀珮CPU鍗犵敤鐜囩殑鏁板瓧鍥懼儚澶勭悊搴旂敤涓娿€?
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